These are the channel logs matching your query risc
| 2023-01-28 | [10:37:26] <lilyp> https://logs.guix.gnu.org/guix/search?query=risc |
| 2023-01-20 | [12:53:18] <ekaitz> jonsger: we don't have it yet, but it will be risc-v |
| 2023-01-18 | [14:37:34] <Fd9a> Hi. Has anyone already run Guix on VisionFive 2 RISC-V board? I'm trying to build an image, but a strange error appears - error: wsl2-image-type: unbound variable. I run: guix time-machine -C channels-vf2.scm -- system image --image-type=visionfive2-raw ~/dotfiles/magi/system/kokuou.scm --system=riscv64-linux. For the build I use the wip-riscv branch, where wsl2-image-type is not defined. I don't understand where this error is coming |
| 2022-11-04 | [15:32:51] <tricon> nckx: i feel ya. i'd quite like to get into ARM/RISC-V archs; but at this moment, i feel more inclined to hack on x64 Hurd than work with other archs at that level. of course, there's so much work to do on x86 Hurd as-is. |
| 2022-10-01 | [15:58:45] <nckhexen> * -risc-v, excuse me. |
| 2022-09-25 | [14:21:46] <oriansj> I guess that conversation is less crazy than RISC-V wasting 3/4 of their opcode space on a handful of "compact" instructions |
| 2022-09-05 | [13:38:06] <efraim> /gnu/store/dl192sx56kqcxan1i1qas03nkhj6bpqa-webkitgtk-2.36.7/lib/libwebkit2gtk-4.1.so.0.1.11: ELF 64-bit LSB shared object, UCB RISC-V, RVC, double-float ABI, version 1 (SYSV), dynamically linked, not stripped |
| 2022-07-29 | [18:43:11] <clever> antipode: LK supports arm, risc-v, x86, vc4, m68k, and many others! |
| 2022-06-08 | [18:13:41] <KarlJoad> How easy is it to create cross-platform development environments? I want a GCC to run on x86 and compile for RISC-V. I also need tools like "make" to run (on x86 again). |
| 2022-06-04 | [20:29:29] <nckx> Maybe the Hurd can skip x86_64 and go straight for RISC-V. |
| 2022-05-12 | [02:31:16] <Aurora_v_kosmose> > I was at the 5th RISC-V Workshop in 2016, and heard Eric Grosse, then Google's VP of Security and Privacy, say that a future without risc-v was too scary to consider. | Considering the counterproductive attitude of the RISC Foundation, this seems oddly optimistic to me. |
| 2022-05-12 | [02:37:12] <littlebobeep> Aurora_v_kosmose: The author of that post has claimed there are potential patent infringements with RISC-V but I am not sure which |
| 2022-05-12 | [02:40:44] <bjc> i haven't done a tremendous amount with risc-v, but the published (mostly lettered) extensions seem to cover the standard use cases |
| 2022-05-12 | [02:43:49] <Aurora_v_kosmose> littlebobeep: For core RISC-V no. |
| 2022-05-12 | [02:45:30] <littlebobeep> oriansj: Searx returns nothing on risc-v lambda core, what is that? should be a LISP processor lol |
| 2022-05-12 | [02:48:44] <bjc> in terms of extensions, i thought it was explicit that the point of risc-v was to have an open general purpose isa that corporations could build vendor extensions on |
| 2022-05-12 | [02:49:20] <bjc> risc-v was only ever made to eat arm's lunch, but otherwise preserve the status quo |
| 2022-05-12 | [02:50:22] <bjc> google, apple, et al were tired of paying the arm tax. so we got risc-v |
| 2022-05-03 | [04:03:49] <luke-jr> littlebobeep: well, it would have been cool to implement RISC-V or some other architecture in microcode :P |
| 2022-04-04 | [21:00:23] <unmatched-paren> how would i install a RISC-V binutils on guix? |
| 2022-02-22 | [13:52:39] <efraim> https://web.archive.org/web/20190410061529/https://riscv.org/software-tools/risc-v-gnu-compiler-toolchain/ |
| 2022-02-20 | [11:29:33] <VS4mwaLnRSM> Maybe RISC-V one day. |
| 2022-02-06 | [11:21:30] <civodul> great talk by ekaitz on RISC-V minutes ago |
| 2021-12-26 | [15:29:36] <lilyp> as for using Guix on a RISC V system natively, that's currently being bootstrapped |
| 2021-12-26 | [15:44:59] <gbrlwck> hrmmm... i'm working on getting MEScc to output RISC-V M1 (for the full-source bootstrap toolchain) and it would come in really handy if i could get gcc's asm output for riscv architecture on my host machine (since the RISCV one is slowish) |
| 2021-12-16 | [21:49:07] <jgart> or risc-v |
| 2021-12-02 | [21:04:23] <lfam> Or even RISC-V |
| 2021-12-02 | [21:18:01] <robin> (imho POWER, as distributed by raptorcs and a handful of other projects, might be important for high-performance RYF workstations in the future assuming POWER10 ends up being RYF-compatible. maybe RISC-V too at some point which i haven't been following as closely) |
| 2021-12-02 | [21:41:44] <lfam> RISC-V |
| 2021-11-10 | [13:58:26] <robin> some of it's not even that bad, e.g. some of the firmware files are programs for documented RISC architectures |
| 2021-10-31 | [14:52:13] <gbrlwck> i am trying to `guix pull` on a RISC-V ubuntu machine but this process hangs while building 9xnyrapxcfk7mi4id3wf7g54m8hrrdgd-python-minimal-3.9.6.drv. i count 71 zombie "[python] <defunct>" processes. https://termbin.com/j01x |
| 2021-10-31 | [15:00:00] <nckx> I don't have a RISC-V machine is the thing… |
| 2021-10-03 | [17:50:47] <ruffni> i'm running into "#<record-type <operating-system>>: record ABI mismatch; recompilation needed" trying to build guix on wip-risc (it comes from gnu/tests/install.scm). any ideas what i should be looking for in install.scm? |
| 2021-09-27 | [16:32:48] <Librecat> imagine if someone bootstraps gnu/linux from a handmade extremely slow risc-v cpu to a libreboot desktop and that is the only thing that people can use |
| 2021-08-22 | [09:34:21] <efraim> sneek: later tell vagrant come join us in #guix-risc-v :) |
| 2021-08-05 | [21:20:06] <leoprikler> Whoever wins that should get some (friendly) spam mail about winning a RISC board or something :) |
| 2021-08-05 | [23:43:33] <leoprikler> roptat: I said RISC, not RISK :( |
| 2021-08-04 | [15:31:49] <Noisytoot> /gnu/store/afv9qkdxh8wpfgkyqadp5avxppy8q7nl-hello-2.10/bin/hello: ELF 64-bit LSB executable, UCB RISC-V, version 1 (SYSV), dynamically linked, interpreter /gnu/store/8n3cdnafvlpg0m68gz4spns4lx87x1sf-glibc-cross-riscv64-linux-gnu-2.31/lib/ld-linux-riscv64-lp64d.so.1, for GNU/Linux 2.6.32, not stripped |
| 2021-07-30 | [09:23:26] <efraim> /gnu/store/cciydgr8kc3jln1rr7q4glgqq3gy44bm-hello-2.10/bin/hello: ELF 64-bit LSB executable, UCB RISC-V, version 1 (SYSV), dynamically linked, interpreter /gnu/store/12y2vx496r7s3hpy3v1as9wv8fhj33ih-glibc-2.33/lib/ld-linux-riscv64-lp64d.so.1, for GNU/Linux 2.6.32, stripped |
| 2021-06-25 | [11:27:08] <ekaitz> civodul and efraim : I want to start to port Guix to RISC-V because I want to make some tests of other things I'm porting and I don't have the chance to run environments... (tar bootstrap binary not found) |
| 2021-06-25 | [11:40:35] <civodul> all this RISC-V stuff is pretty exciting |
| 2021-06-17 | [20:19:58] <vagrantc> not according to https://wiki.debian.org/RISC-V#Toolchain_upstreaming_status |
| 2021-06-12 | [23:37:24] <Noclip[m]> vagrantc: You're porting guix over to RISC-V? Awesome! |
| 2021-06-10 | [19:55:01] <efraim> there's also #guix-risc-v but I don't think it's actually official |
| 2021-05-28 | [18:54:37] <nckx> drakonis: There are also, for example, #guix-hpc and #guix-risc-v. |
| 2021-05-21 | [17:04:46] <ekaitz> /gnu/store/8n3cdnafvlpg0m68gz4spns4lx87x1sf-glibc-cross-riscv64-linux-gnu-2.31/lib/crt1.o: ELF 64-bit LSB relocatable, UCB RISC-V, version 1 (SYSV), for GNU/Linux 2.6.32, with debug_info, not stripped |
| 2021-05-06 | [02:28:13] <tophullyte> i wait for the day i can get my hands on a power9 or risc v based laptop TuT |
| 2021-04-30 | [16:59:35] <raghavgururajan> pineapples: POWER uses RISC design (same as ARM). |
| 2021-04-30 | [21:51:25] <leoprikler> until all of computing becomes absorbed by RISC-V |
| 2021-04-30 | [22:00:13] <Noclip> leoprikler: Did someone already port guix over to RISC-V? |
| 2021-04-16 | [19:06:41] <lle-bout[m]> I suggest OpenPOWER for desktop/workstation and RISC-V for laptop when it becomes available, though chips with less power consumption based on OpenPOWER might also appear though not the focus of IBM now it seems (they're the main vendor of chips for now) |
| 2021-04-10 | [23:30:01] <Noisytoot> Does Guix support RISC-V? |
| 2021-03-21 | [19:14:37] <vagrantc> pinebook*, pine64_plus, and more recently pinephone ... soon to get the risc-v soldering iron too :) |
| 2021-03-16 | [00:33:36] <Yar54> That reminds me pkill9 risc-v or power? don't have a lot of good answers from a search |
| 2021-03-16 | [00:33:42] <lfam> I think that RISC-V has potential, but only if people that care about free software design RISC-V hardware. Already there is a lot of RISC-V hardware deployed that is not open |
| 2021-03-13 | [04:28:05] <lle-bout> Recent SiFive RISC-V may also give us something similar |
| 2021-02-25 | [23:02:38] <bone-baboon> Has anybody got Guix running on risc-v hardware? |
| 2021-02-10 | [01:16:12] <OriansJ> open call for those with PowerPC and RISC-V hardware to help #bootstrappable get a FULL Source Bootstrap for their platforms. |
| 2021-02-10 | [01:19:45] <lfam> It's not the most powerful RISC-V computer available, but they solicited inquiries, so I inquired |
| 2021-02-08 | [11:18:09] <dftxbs3e> civodul, OTOH RISC-V hardware is less expensive and thus more accessible (more like ARM) |
| 2021-01-26 | [23:11:45] <lfam> I applied at beagleboard.org for early access to their upcoming RISC-V boards |
| 2021-01-23 | [13:26:35] <ekaitz[m]> hi everyone, does gcc-toolchain provide a risc-v cross-compiler or is it packaged somewhere else? |
| 2021-01-23 | [13:28:37] <ekaitz[m]> I see there's a arm-none-eabi-toolchain but I'm unable to find a risc-v compiler toolchain |
| 2021-01-23 | [16:13:11] <theruran> it will make it easier to do RISC-V development |
| 2021-01-23 | [16:19:14] <rekado_> ekaitz[m]: doesn’t upstream GCC already support RISC-V? |
| 2021-01-22 | [01:57:51] <wleslie> of course if you want to verify no covert/timing channels it's going to be easier with something simpler, which is why the seL4 people love risc-v so much |
| 2021-01-20 | [18:29:47] <lfam> I was also thinking that perhaps some enterprising Guix porters should apply for early access to the upcoming BeagleV RISC-V computer from BeagleBoard. They will be making them available to developers early |
| 2021-01-20 | [18:32:32] <vagrantc> lfam: i was thinking of hitting up the beaglev when it's further along, and also will soon have access to a couple capable risc-v boards |
| 2021-01-20 | [18:36:41] <vagrantc> risc-v has largely learned from the mistakes of arm, in that sense, a single kernel should probably work |
| 2021-01-20 | [18:46:29] <vagrantc> https://wiki.debian.org/RISC-V#Toolchain_upstreaming_status |
| 2021-01-20 | [19:51:54] <vagrantc> hah, RISC-V was already mentioned at https://libreplanet.org/wiki/Group:Guix/FOSDEM2021 and i added a duplicate |
| 2021-01-15 | [22:24:07] <lfam> They moved to RISC-V |
| 2021-01-15 | [22:25:28] <Aurora_v_kosmose> Hmm, I wonder, does any distro support RISC-V atm? |
| 2021-01-15 | [22:27:46] <vagrantc> beagleboard.org hasn' *moved* to risc-v, it's also supporting a new risc-v board |
| 2021-01-15 | [23:06:49] <lfam> I think the presentation "Impedance Matching Expectations Between RISC-V and the Open Hardware Community" by Bunnie Huang (Novena designer) is a good exploration of the problems |
| 2021-01-13 | [15:24:17] <dustyweb> https://arstechnica.com/gadgets/2021/01/seeed-and-beagleboard-team-up-to-provide-a-new-risc-v-based-linux-pc/ good news, $150 risc-v beaglebone board coming |
| 2021-01-05 | [21:37:48] <efraim> have you looked at the sifive risc-v board? https://www.sifive.com/boards/hifive-unmatched |
| 2020-08-09 | [18:53:59] <butterypancake> so the firmware is open so it's better than intel/amd but the cpu isn't open so it's worse than risc-v? Is that a fair statement? |
| 2020-08-09 | [18:54:27] <dftxbs3e> butterypancake, no because RISC-V chips arent open either, the PowerISA is royalty-free just like RISC-V |
| 2020-08-09 | [18:55:03] <butterypancake> dftxbs3e: risc-v isn't open hardware? wtf? than why do I care. Oh no, research time I guess |
| 2020-08-09 | [18:55:05] <joshuaBP`> RISC-V chips also have you sign a NDA if you want to develop new standards. |
| 2020-08-09 | [18:57:14] <dftxbs3e> There's libre implementations of PowerISA like RISC-V but they are not performant, and for the case of RISC-V, no chip is actually really performant |
| 2020-05-20 | [20:48:08] <raingloom> i heard rumors of a RISC-V GPU, but idk if that'll be open or even have the features necessary for 3D work. |
| 2020-04-29 | [05:49:42] <lfam> Yes, RISC-V could be great, but we don't have any hardware yet |
| 2020-03-25 | [20:08:15] <mbakke> mingw, powerpc, risc-v... no shortage of things to fix |
| 2020-03-22 | [23:22:59] <lfam> Have you ever heard Bunnie Huang's talk "Impedance Matching Expectations Between RISC-V and the Open Hardware Community"? |
| 2020-03-22 | [23:27:53] <midnight> lfam: I wrote Bunnie recently, as he wrote an obscure blog post about risc-v open-sourced-ness being not quite there, and it appears the logic he's talking about is still closed. Most of the risc-v people think that refers to the preboot e.g. DIMM config but not at all. Really weirdly, IBM has no issues releasing chip information right down to the rings data. |
| 2020-03-22 | [23:34:27] <midnight> nckx: There's a really neat guy who was originally doing a risc-v CPU "from scratch" using blocks of gate logic, but I think he relented and went to an array a chunk of the way through. Can't find his videos now. |
| 2020-03-06 | [22:36:53] <bryanhonof> Or maybe an extention to the RISC-V architecture to support lisp instructions. That would be cool i.m.o. |
| 2020-02-14 | [13:44:26] <kmicu> I can only display 8 lines on my RISC‑V SBC with ISP RGB screen. |
| 2020-02-10 | [19:46:31] <vagrantc> dongcarl: were you also looking as risc-v stuff? i managed to get enough into guix to cross-build opensbi, u-boot and a kernel ... that can get as far as a kernel panic :) |
| 2020-02-10 | [19:49:25] <vagrantc> i hear mumblings in #bootstrappable about porting risc-v |
| 2020-02-01 | [04:37:09] <oriansj> the M2-Planet port to RISC-V however will take a good bit longer (it is a horriable to bootstrap target) |
| 2020-02-01 | [05:27:33] <vagrantc> now guix has the parts that get you as far as a bootloader prompt: https://wiki.debian.org/RISC-V#Setting_up_a_riscv64_virtual_machine |
| 2020-01-25 | [01:20:55] <oriansj> Fortunately we have a C root of trust bootstrapped from hex0; already done and currently being ported to AArch64 and RISC-V shortly after |
| 2020-01-18 | [13:07:18] <leoprikler> nckx: Well, it's the nativest you can get on an x86 board, even if that CPU is itself an interpreter that JIT-compiles to some RISC. |
| 2020-01-18 | [13:59:39] <peanutbutterandc> nckx, "Guix SD: Post-Apocalyptic Box-Set. Buy now to support the FSF! Running on RISC-V Librebooted Laptop!" I'd so totally want that! |
| 2020-01-15 | [12:19:50] <peanutbutterandc> nckx, TPs seem to be the most popular thing among those wanting all-free system. Perhaps this will change once RISC-V laptops hit the market? Risc-v pinebooks, perhaps? |
| 2020-01-14 | [22:29:46] <zig> re open hardware, is there anyone working with risc-v? |
| 2020-01-14 | [22:32:14] <kmicu> I do not plan to put Guix on My RISC-V with 128KB Flash, 32KB SRAM |