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2023-03-10[00:50:54] <stikonas> probably knight stuff would break
2023-03-31[00:09:24] <oriansj> My long term plan is to make Knight hardware real again.
2023-04-30[21:47:46] <[exa]> I was kinda wondering there, because the rv64 instruction set looks strictly more simpler than the knight instruction set, except for the ugly registers and ints torn into pieces, so how to approach that thing most easily...
2023-05-12[00:14:13] <oriansj> (The original knight was symmetric complement and its current code would have produced the exact same output even if it was one's complement)
2023-12-07[17:03:56] <Googulator> As I understand it, the "knight" ISA is based on Tom Knight's LISP machine design
2024-02-15[02:26:20] <GoogulatorMobile> Isn't that dependent on knight?
2024-09-15[04:46:01] <oriansj> but you got the byte order wrong; %0x12345678 would be 78 56 34 12 on x86 (which I am assuming is your target architecture) unless the goal was to target knight which is Big Endian not Little byte endian.
2024-09-17[15:26:26] <Guest50> > Implement the Knight processor in FPGA and then convert into TTL.
2025-01-27[02:10:09] <jleightcap> cc_x86 makes me wonder what the state of e.g. knight and rv32 are
2025-02-15[00:22:20] <matrix_bridge> <Andrius ��tikonas> and I wouldn't be surprised if arm7a and knight also need some fixes...
2025-02-15[01:49:15] <stikonas> hmm, arm and knight might be fine from what I can see without testing
2025-02-15[03:20:20] <oriansj> we also could be slightly less optimal and leverage the same trick we used with armv7l and aarch64 and knight