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<damo22>to stop nested interrupts?

<damo22>ok now the first task isnt broken

<damo22>but its sitting somewhere with HLT=1 and interrupts off

<damo22>(only one core)

<damo22>* An implicit assumption made

<damo22>* throughout the TLB code is that all kernel code that runs at or higher

<damo22>* than splvm blocks out update interrupts, and that such code does not

<damo22>* touch pageable pages.

<damo22>youpi: i need some help to interpret how the TLB shootdown is supposed to work, i am just calling an IPI to raise an interrupt 251 on target cpu, and making it call pmap_update_interrupt, but that doesnt seem to be enough

<damo22>for example, do i need to set the spl level to something on the caller or the callee cpu?

<damo22>we used to have 7 spl levels but we in effect have 2 now

<damo22>the inline docstring says something about splip but that does not exist

<damo22>for InterProcessor

<damo22>i confirmed that the interrupt 251 works

<damo22>is it possible that we need a 3rd spl level not just on or off, just so that the coherency can work?

<damo22>because if its off(spl7) it cant be interrupted at all so splvm / splhigh are identical

<damo22>i dont know if that matters or not

<damo22>does the caller cpu need to wait until the callee cpu has processed the interrupt?

<Guest5649>Damo22: check this line, https://github.com/slp/osfmk-mklinux/blob/master/osfmk/src/mach_kernel/intel/pmap.c#L3328 it’s been added on top of gnumach. I don’t really know what this means, but thought it might help your.

<Guest5680>Funny that GNU adopted the Mickey Mouse policy of removing the commit logs from Mach. I’m imagining MIT engineers all afraid of rms discovering they didn’t do this or that part and then bragging RMS how good they were :D https://github.com/slp/osfmk-mklinux/blob/master/osfmk/src/mach_kernel/intel/pmap.h#L25

<youpi1>damo22: I don't think we'll need to reintroduce more spl

<youpi1>yes, the signaling processor should wait for acks from others, see what's written: « Thus it must wait for an * acknowledgement of the interrupt from each processor for which such * references could be made. »

<youpi1>also, note « This assumes the interrupt is cleared before the low level interrupt code* calls pmap_update_interrupt()) »

<youpi1>this is important, to avoid missing yet another update

<youpi1>in case yet another processor makes some pmap change, the additional IPI has to be noticed

<youpi1>acknowledging the interrupt before calling pmap_update_interrupt allows to make sure of that

<youpi1>since it'll then be just called a second time just after finishing

<damo22>i moved the update interrupt call below the EOI, it didnt seem to help much but its needed

<damo22>i dont know how to fix this :\

<damo22>goodnight

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2023-01-29.log