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2026-05-16.log

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<siraben>stikonas: running some tests to ensure the m2-planet pr isn't going to change stuff downstream
<siraben>we really should have CI for all this tbh
<matrix_bridge><Andrius Štikonas> siraben, yeah thanks
<matrix_bridge><Andrius Štikonas> it is very helpful if you can test it with some downstream stuff
<matrix_bridge><Andrius Štikonas> yeah, something that clones stage0-posix, replaces submodules with PR and checks it completes
<siraben>Looks like removing IR optimizations help the overall time-to-first-tcc metric
<siraben>while barely making a difference on the performance of the first tcc compiled by hcc, and 470 lines removed too
<xentrac>awesome
<roconnor>Is time-to-first-tcc the best thing to optimize?
<roconnor>I guess removing lines of code is good.
<siraben>roconnor: it's one of the things to optimize. I'm trying to balance: simplicity of implementation, LOC, time to first tcc
<stikonas>ability to port to other architectures is even more important
<stikonas>we have some very fast builds to tcc
<stikonas>but x86 only
<stikonas> https://github.com/cosinusoidally/tcc_bootstrap_alt
<stikonas>time is also hard to measure, depends a lot on the system
<stikonas>e.g. on riscv board that I have it is maybe 2 weeks to tcc
<siraben>Yeah I'm only doing relative timings of course, some things are clearly linear wrt. source code
<siraben>I've only ever run riscv in qemu heh