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2022-07-02.log

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<stikonas>Guest34: hi again
<Guest34>Hello!
<stikonas>Guest34: take a look at long bootstrap of GCC on x86 https://github.com/fosslinux/live-bootstrap/blob/master/parts.rst
<stikonas>so for riscv we can only do firrst 3 and a half steps
<Guest34>OK, thanks for this exact reference. So is it because of a lack of a Mes interpreter?
<Guest34>for RISC-V?
<stikonas>mes interpreter can be ported fairly easily to riscv but mescc compiler (written in scheme) that mes interprets is not done
<stikonas>(hence 3.5 steps)
<stikonas>and there will be a few more tricky steps later...
<stikonas>such as porting risc-v support to older GCC, etc...
<stikonas>so that might take a long time to do if we are ever able to
<stikonas>note that we don't even have it working on x86_64
<stikonas>only actual x86
<Guest34>OK! Thank you. So, work needs to be done. Once it get more familiar with all of this, I may try to make it happen (unless somebody would have done it before, most likely). It is going to take a lot of time from my side to dive into it. Though I like all of this, the fact that I have another time-taking primary occupation (not even related to
<Guest34>software) slows down a lot my pace of learning. Thanks for pointing out the right resource. I saved me some time localizing it.
<Guest34>Have a good day!
<stikonas>Guest34: feel free to join again
<Guest34>