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2022-01-13.log

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<stikonas>gbrlwck: do you mean cc_* or M2-Planet
<stikonas>we don't really have a list in either case
<stikonas>it's probably easier to say what is supported...
<stikonas>anyway, M2-Planet is missing . operator, post/pre increments/decrements
<stikonas>somethng is still buggy if defines or maybe ifdefs
<stikonas>then no support for multidimensional int arrays
<stikonas>no support for type casting, i.e. (int) variable
<stikonas>maybe related to . operator, but structs can only be defined globally and allocated with malloc, no support for storing structs on stack as local variables
<stikonas>cc_* is missing even more, but that doesn't really matter since M2-Planet is written to be buidlable with cc_*
<gbrlwck>thanks!
<stikonas>it's likely that I missed something
<stikonas>also, some of the things I mentioned above are not really needed
<stikonas>e.g. I think we can live without int[X][Y]
<gbrlwck>i was documenting the bootstrapping path for my thesis and figured, it might illustrate the tools better to know which c construct /don't/ work with them :)
<stikonas>gbrlwck: oh, another big thing is pointer arithmetic
<stikonas>it works differently in M2-PLanet
<stikonas>p+=1 means adding 1 to address rather than size of the type
<stikonas>gbrlwck: there are some smaller issues too, e.g. boolean operators do not short circuit
<stikonas>and in fact they might be bitwise operators rather than boolean
<stikonas>I think I fixed it for !, so ! acts as boolean not rather than bitwise not because I needed that functionality. But && and || are probably still & and |
<stikonas>until recently M2-Planet also didn't support compound assignment operators, e.g. += but that was added recently
<stikonas>also arrays of pointers now work, e.g. char **argv (so argv[0][2] does work). Not to be confused with int a[2][3] which is not an array of pointers
<gbrlwck>also, i might have stumbled upon an issue for the riscv port, but maybe you can help
<stikonas>?
<gbrlwck>in hex2 we use & to prefix 32-bit addresses (the value is replaced when linking the files)
<stikonas>yes
<stikonas>I think that is true generally for all arches
<gbrlwck>in riscv single-instruction jumps only take 12-bit immediates; for 32bit jumps we need to `lui' first
<stikonas>& is not for jumps
<stikonas>it's used for creating pointers
<gbrlwck>ah, yeah, i meant %
<stikonas>e.g. to create array of pointers that point to some data later
<gbrlwck>ah, ok, found it again.
<stikonas>well, % is same thing but relative displacement
<stikonas>I don't think I used it though
<gbrlwck>i do it in the MEScc port
<stikonas>oh, % is actually used
<stikonas>oh wait, that's M1
<stikonas>let me check in hex2
<stikonas>hmm, no, I didn't use %
<gbrlwck>i branch with an immediate value (which is a label); only problem i can imagine is if the label exceeds 12-bit
<stikonas>well, do indirect branches
<stikonas>branch + jump
<stikonas>then you can do 20 bit
<stikonas>or do you need more?
<stikonas>gbrlwck: e.g. in M2-Planet I used those indirect branches https://github.com/oriansj/M2-Planet/blob/master/cc_core.c#L1915
<stikonas>so branching condition skips one instruction (which is jump somewhere far)
<gbrlwck>i see!
<stikonas>but for longer jumps you'll need lui
<gbrlwck>but there's no way to check the length of the jump before linking stage, is there?
<stikonas>since JAL still only accepts 20-bit intermediate
<stikonas>gbrlwck: I don't think so
<stikonas>hex2 is still a fairly simple linker
<gbrlwck>hm
<stikonas>20-bit is 1 million
<stikonas>and jumps are in multiple of bytes, I think instructions
<stikonas>so that's +/- 2MiB
<stikonas>should be sufficient for M2-Planet and mescc
<gbrlwck>i hope it suffices for tcc
<stikonas>yeah, should be fine
<stikonas>we don't get to 1MiB sized binaries till much much later
<stikonas>possibly bison...
<gbrlwck>otherwise we would have to implement a smarter linker (replacing a single instruction with two others also alters all the labels)
<gbrlwck>phew
<stikonas>it might be that we can even reach binutils before we reach such big binaries
<stikonas>anyway, riscv64 will need other problems solved before we can even reach binutils
<stikonas>that's way way ahead of us
<gbrlwck>true
***pritambaral is now known as prite
<gbrlwck>isn't 2^20 more like 1024^2 aka 1MiB? and in signed that'd be +- 512KiB (RISC-V addresses in Bytes, an instruction is 4 Bytes) so that'd give us 128 KiB of relative jumps)?
<gbrlwck>sorry, i mean relative jumps of +- 128Ki instructions
<stikonas>gbrlwck: risc-v instructions are 32-bit long, so that's 4 bytes
<stikonas>512 KiB * 4 = 2MiB
<stikonas>it's not divided by but multiplied
<stikonas>i.e. jal 1 is jump 4 bytes forward
<stikonas>not jump 2 bits forward
<gbrlwck>i'm not sure. from the specs: "An instruction-address-misaligned exception is generated on a taken branch or unconditional jump if the target address is not four-byte aligned."
<gbrlwck>i'd say jal 1 is 1 byte forward (and raises an instruction-address-misaligned exception)
<stikonas[m]>Well, we can check in .hex0 files
<stikonas[m]>Oh maybe it is 1 byte
<stikonas[m]>Still you get +/-512KiB
<stikonas[m]>I was prob thinking of B type encoding
<stikonas[m]>Where it's not 1 byte
<gbrlwck>it's the same in both :) and in the link you posted hours ago you "RS1_A0 @8 BNEZ" :)
<stikonas[m]>@8 is 4 when encoded
<stikonas[m]>E.g here https://github.com/oriansj/stage0-posix/blob/99cdd03a78b67f58deab47f52b2819c3ecf7d3bc/riscv64/hex0_riscv64.hex0#L113
<stikonas[m]>@16 becomes 8 in third position
<stikonas[m]>hex1/2 handle this
<stikonas>gbrlwck: https://github.com/oriansj/mescc-tools/blob/master/hex2_word.c#L77
<stikonas>if you look at that line, value must be even
<gbrlwck>true! i now see that the LSB is omitted from the B and J instruction types
<gbrlwck>so we virtually have 21 bits at disposal, so +- 20bit which is +- 1MiB, but since we do full 32bit instructions the lowest bit is discarded again -- hence +-512KiB
<stikonas>no, that was true only for B-type instructions
<stikonas>which are 12 bit encoded
<gbrlwck>i mean J type
<stikonas>J-type (JAL) is just 20-bit, there is no unused bit
<gbrlwck>there's also no LSB (bit 0) in J type instructions
<stikonas>hmm, or maybe I'm misunderstanding
<stikonas>let me double check
<stikonas>oh yes, risc-v also has 1 unused bit
<stikonas>for j-type
<stikonas>so jump amount has to be even
<stikonas>so I guess +/- 1MiB then
<stikonas>anyway, the linker deals with these issues
<stikonas>just assume that jumps fit
<stikonas>and if we ever hit limits, then that can be fixed
<gbrlwck>i will and i do :) thanks for the clarifications!