***nckx is now known as nckx-
***nckx- is now known as nckx
<Hagfish>One interesting aspect are timing channels. We have been working for a number of years on *time protection*, the temporal equivalent of memory protection, as a systematic timing-channel prevention. Our experience on x86 and ARM processors is that they lack the mechanisms to do this completely. RISC-V presents an opportunity to get this right <fossy>let me ask my dad about this <fossy>he knows some of the ppl who worked on it <OriansJ`>Hagfish: well if I remember the reason for why x86 and ARM don't support it is due to the performance penalties on OoO processors is brutal and superscalar processors take a beating on branching performance.